VSC Training Course: Node-Level Performance Engineering, December 5-7, 2018

    Description:

    This course covers performance engineering approaches on the compute node level. "Performance engineering" as we define it is more than employing tools to identify hotspots and bottlenecks. It is about developing a thorough understanding of the interactions between software and hardware. This process must start at the core, socket, and node level, where the code gets executed that does the actual computational work. Once the architectural requirements of a code are understood and correlated with performance measurements, the potential benefit of optimizations can often be predicted. We introduce a "holistic" node-level performance engineering strategy based on the Roofline model and apply it to different algorithms from computational science. Architectural details that are relevant for performance, such as pipelining, SIMD, superscalarity, memory hierarchies, etc., are covered in due detail.

    This course provides –via lectures, demos, and hands-on labs– scientific training in Computational Science, and in addition, the scientific exchange of the participants among themselves.

    This course is organized in cooperation with the Erlangen Regional Computing Center (RRZE).

    Agenda:

    First day:

    09:00 - 09:30   local registration
    09:30 - 13:00   lectures and hands-on labs (with breaks: 10:30-10:45 & 11:45-12:00)
    13:00 - 14:00   lunch break
    14:00 - 17:00   lectures and hands-on labs (with breaks: 15:10-15:25)

    Second day:

    09:00 - 13:00   lectures and hands-on labs (with breaks: 10:15-10:30 & 11:45-12:00)
    13:00 - 14:00   lunch break
    14:00 - 17:00   lectures and hands-on labs (with breaks: 15:10-15:25)

    Third day:

    09:00 - 13:00   lectures and hands-on labs (with breaks: 10:15-10:30 & 11:45-12:00)
    13:00 - 14:00   lunch break
    14:00 - 17:00   lectures and hands-on labs (with breaks: 15:10-15:25)

    Content:

    Introduction

    • Our approach to performance engineering
    • Basic architecture of multicore systems: threads, cores, caches, sockets, memory
    • The important role of system topology

    Tools topology & affinity in multicore environments

    • Overview
    • likwid-topology and likwid-pin

    Microbenchmarking for architectural exploration

    • Properties of data paths in the memory hierarchy
    • Bottlenecks
    • OpenMP barrier overhead

    Roofline model: basics

    • Model assumptions and construction
    • Simple examples
    • Limitations of the Roofline model

    Tools: hardware performance counters

    • Why hardware performance counters?
    • likwid-perfctr
    • Validating performance models

    Roofline case studies

    • Dense matrix-vector multiplication
    • Sparse matrix-vector multiplication
    • Jacobi (stencil) smoother

    Optimal use of parallel resources

    • Single Instruction Multiple Data (SIMD)
    • Cache-coherent Non-Uniform Memory Architecture (ccNUMA)
    • Simultaneous Multi-Threading (SMT)

    Extending Roofline: The ECM performance model

    Optional: Pattern-based performance engineering 

    Prerequisites:

    Participants should be able to work on the Linux command line, must have basic knowledge in programming with Fortran or C, and basic OpenMP.

    Lecturers:

    Georg Hager and Gerhard Wellein (RRZE / HPC, Uni. Erlangen)

    Language:

    English

    Date, Time, and Location:

    5. - 7.12.2018, 09:00 - 17:00,
    FH Internet-Raum FH1 (TU Wien, Wiedner Hauptstraße 8-10, ground floor, red area)

    Registration:

    Opens external link in new windowRegistration form

    Registration will start on October 10, 2018.

    Registration deadline is Monday, November 7, 2018, with priority rules. Acceptance will be approved on November 8, 2018. As long as seats are available there will be an extended registration period without priority rules.

    Priority for acceptance: first - active users of the VSC systems, second - students and members of Austrian universities and public research institutes, third - other applicants.

    Fee:

    VSC users: none
    Students and members of Austrian universities and public research institutes: none
    Students and members of other universities and public research institutes: 180 €
    Others: 600 €

    Information about payment will be provided with the confirmation email.

    Coffee breaks are included in the course fee (lunch is not included).

    Slides:

    A link to the presentation slides will be available at course start.

    Local Organizer / Contact:

    Claudia Blaas-Schenner, vsc-seminar@list.tuwien.ac.at

     

    Training events of VSC:

    Opens external link in new windowvsc.ac.at/training